A Programmable Max-Log-MAP Turbo Decoder Implementation

<table>Trellis of eight state 3GPP constituent code.
Transmitted systematic and parity bit pairs <svg height="13.9625" id="M45" style="vertical-align:-2.21957pt" version="1.1" viewbox="0 0 45.650002 13.9625" width="45.650002" xmlns="http://www.w3.org/2000/svg">
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<tspan style="font-size: 12.50px; " x="0" y="0">(</tspan>
<tspan style="font-size: 12.50px; " x="4.1634989" y="0">𝑥</tspan>
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<tspan style="font-size: 8.75px; " x="0" y="0">𝑠</tspan>
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<tspan style="font-size: 12.50px; " x="0" y="0">,</tspan>
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<tspan style="font-size: 8.75px; " x="0" y="0">𝑝</tspan>
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encoder.</table>

VLSI Design

A Programmable Max-Log-MAP Turbo Decoder Implementation

Figure 4