Design and Analysis of Nanoscaled Recessed-S/D SOI MOSFET-Based Pseudo-NMOS Inverter for Low-Power Electronics

Table 3

Comparison of delay of inverters at 90 nm channel length.

References	Inverter delay
Samanta et al. [24]	0.31 ns
Sing et al. [25]	9.43 ps
Rodoni et al. [26]	4.7 ps
Proposed pseudo-NMOS	0.43 ps