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Journal of Nanotechnology
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Journal of Nanotechnology
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2019
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Article
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Fig 19
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Research Article
Design and Analysis of Nanoscaled Recessed-S/D SOI MOSFET-Based Pseudo-NMOS Inverter for Low-Power Electronics
Figure 19
Transient analysis of pseudo-NMOS for TMG Re-S/D FD SOI MOSFET at 90 nm channel length.