AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation

<div>(a) A binary tree topology utilizing switches operating at different clock frequencies. (b) The tree as an H-tree for better floorplanning on the FPGA.</div>

International Journal of Reconfigurable Computing

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Figure 2: AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation 