FPGA Implementation of an Improved Reconfigurable FSMIM Architecture Using Logarithmic Barrier Function Based Gradient Descent Approach

Table 4

Updated description of .

Input		PS	NS	O/P
0	0					0
1	0			0
0	0			0
1	0			0
0	0			0
1	1			0
0	1			1
0	0			1
1	1			1
0	0			1
0	1			1
1	0			1
0	1			1
0	0			1
1	1			1
1	1			0
0	1			0
1	0			0
0	1			1
0	0			1
0	0			1
1	0			1
1	1			1
1	0	S8	S1	0
0	0	S8	S0	0
0	0	S8	S0	0
1	1			1
1	0			1
0	1			1
1	0	S10	S1	0
0	0	S10	S0	0
0	0	S10	S0	0