Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise—Designing a Computer Architecture via HLS)

Figure 7

Example of the timing model of the cache “find” function, which is translated from the COTSon to the Vivado HLS. The implementation of this function for both the COTSon (left) and Vivado HLS (right) environments is shown in the bottom part of the figure.