Research Article

Exploiting Partial Reconfiguration through PCIe for a Microphone Array Network Emulator

Figure 8

Our approach consists of several heuristics to optimize the area reuse and to improve performance by reducing . Firstly, the nodes’ configurations are classified and sorted based on their compatible . Secondly, the increment of the area reuse is possible by merging similar nodes’ configurations to increase the overall . Finally, an optimized scheduler minimizes the by properly allocating the nodes.