Exploiting Partial Reconfiguration through PCIe for a Microphone Array Network Emulator

Figure 2

Distribution of the ’s components. The of the nodes and the data communication between the host and the FPGA are done via PCIe. A middleware abstracts the application from the heuristics for the merging and scheduling of the nodes’ configurations, the host-FPGA communication, and the control. The dark blue boxes represent the components involved in the PR.