The concepts of Internet-of-Things (IoT) and Internet-of-Everything (IoE) (e.g., smart city) have been driving the evolution of wireless communications. With ever-increasing demand for higher data rates, service carriers have improved the existing 4th-generation (4G) networks with carrier aggregation and multi-input multi-output (MIMO) antenna techniques, the key features of LTE-Advanced (LTE-A). To evolve beyond 4G, the 5th-generation (5G) networks need to be scalable, versatile, and energy-smart for the hyperconnected IoE world. By employing advanced modulation schemes, massive MIMO, beamforming, and mmWave carriers, the 5G connectivity is expected to achieve significantly enhanced data rate (10 Gbps peak data rate), universal coverage, spectral/spatial diversity/efficiency, and/or minimized latency (sub-1ms).
The emerging connectivity applications have imposed new yet stringent specs to the design of RF front-ends. Furthermore, due to various market factors, designers are facing additional complexities such as multiband, multimode (2G/3G/4G/LTE-A/5G, WiFi, Bluetooth, GPS, etc.), small form factor while balancing cost competitiveness, ever-better performance, and longer battery life. Overcoming these challenges requires high performance innovative solutions.
The motivation of this special issue is to publish the state-of-the-art RF circuit and architecture solutions to help address the design challenges of the IoT/LTE-A/5G connectivity. After a rigorous two-round review process, 6 outstanding papers have been accepted for inclusion in this special issue. The accepted papers cover a wide range of research subjects in RF/mmWave circuits and architectures to meet the increasing demands of 5G and beyond.
The paper entitled “A Review of 5G Power Amplifier Design at cm-Wave and mm-Wave Frequencies” by Dr. D. Y. C. Lie et al. surveyed some advanced 5G power amplifier (PA) designs in various device technologies including wideband Doherty PA in GaAs and in SiGe; stacked PA on SOI CMOS; differential bulk CMOS PA with neutralization cap and transformers; CMOS DPA (digital PA); fully monolithic GaN PA; highly integrated RFFE with LNA, PA, phase shifter, switches for phased-array MIMO, and so forth. These PA designs present potential solutions for successful cmWave and mmWave 5G front-end IC designs.
The paper entitled “A Low Power Impedance Transparent Receiver with Linearity Enhancement Technique for IoT Applications” by S. Chen et al. presented a reconfigurable receiver (Rx) with tunable channel filtering and narrow-band input matching at the Rx input. The passive mixer and active feedback LNA are used in the receiver to further transfer the baseband impedance to Rx input. A 3rd-order active-RC filter is designed with current-efficient feedforward compensated OTA. The digital-to-time converter (DTC) assisted fractional-N all-digital phase-locked loop (ADPLL) is codesigned with the receiver to meet the IoT requirements. By utilizing blocker filtering and derivative superposition techniques, the proposed receiver architecture achieves outstanding performances for low power IoT applications, such as IEEE 802.11ah and NB-IoT.
The paper entitled “A 0.45 W 18% PAE E-Band Power Amplifier in 100 nm InGaAs pHEMT Technology” by Dr. D. Zhao and Y. Yi presented a fully integrated PA using a 4-way zero-degree combiner (in each unit PA) and a 2-way λ/2 combiner to improve the output power. The 5 mm2 GaAs PA outperforms the CMOS PAs for output power while achieving low cost, high yield, and easy foundry access comparing to InP and GaN PAs. Therefore, the proposed design provides attractive solutions for future long-haul point-to-point communications at E-band.
The paper entitled “Digital Predistortion of Ultra-Broadband mmWave Power Amplifiers with Limited Tx/Feedback Loop/Baseband Bandwidth” by C. Yu et al. proposed a novel DPD technique to significantly reduce the bandwidth requirements for the transmitter (Tx), feedback loop, and baseband in the context of ultra-broadband mmWave scenarios. This proposed technique will provide the capability of linearizing mmWave PAs with affordable resources for ultra-broadband signals, which can largely extend the DPD regime into 5G mmWave era.
The paper entitled “A 3.22–5.45 GHz and 199 dBc/Hz FoMT CMOS Complementary Class-C DCO” by L Ma et al. presented a complementary Class-C digitally controlled oscillator (DCO) with differential transistor pairs. The transistors are dynamically biased by feedback loops separately to ensure the robust oscillation start-up with low power consumption. By employing three switched capacitor arrays and a fractional capacitor array dithered by sigma-delta modulator, 51.5% frequency tuning range, and less than 0.1 ppm frequency resolution are achieved.
In the paper entitled “A Novel Quadrature-Tracking Demodulator for LTE-A Applications” by K.-C. Peng and C.-H. Lee, the demodulator uses a novel quadrature phase-locked loop (QPLL) to simultaneously track the I/Q phases of the received signal, thus reducing its sensitivity to the quadrature imbalance in a system. The 2.1~2.5 GHz QPLL-based demodulator can effectively demodulate an 18 Mbps LTE-A signal with a quadrature imbalance of up to 15 degrees. Such a quadrature-tracking ability makes the proposed architecture well suited to LTE-A systems or even more advanced communication systems.
Yan Li
Donald Y. C. Lie
Chaojiang Li
Dixian Zhao
Christian Fager
Conflicts of Interest
We, the Guest Editorial team, as a whole do not have any conflicts of interest or private agreements with companies that would affect, or are perceived to affect, the neutrality or objectivity of research.