TY - JOUR A2 - Begueret, Jean-Baptiste AU - Szántó, Péter AU - Szedő, Gábor AU - Fehér, Béla PY - 2008 DA - 2008/01/31 TI - High-Performance Timing-Driven Rank Filter SP - 753043 VL - 2008 AB - This paper presents an FPGA implementation of a high-performance rank filter for video and image processing. The architecture exploits the features of current FPGAs and offers tradeoffs between complexity and performance. By maximizing the operating frequency, the complexity of the filter structure can be considerably reduced compared to previous 2D architectures. SN - 1065-514X UR - https://doi.org/10.1155/2008/753043 DO - 10.1155/2008/753043 JF - VLSI Design PB - Hindawi Publishing Corporation KW - ER -