Characterizing the Effects of Intermittent Faults on a Processor for Dependability Enhancement Strategy

Table 2

Test benches description.

Test bench	Number of inst.	ALU ops.	Atomic Mem. ops.	Control transfer ops.	Misc. ops.	Descriptions
IFU_BASIC_EX_RAW.S	1194	1178	8	3	8	ALU ops to verify EXU
LDST_ATOMIC.S	363	265	87	3	8	ld./st. ops to verify LSU