Research Article
Characterizing the Effects of Intermittent Faults on a Processor for Dependability Enhancement Strategy
Table 10
SDC ((a) for NET and (b) for REG).
(a) SDC for NET (%) |
| Functional Blocks | Unit | LDST testbench | EXU testbench | SDC | SDC′ | SDC′′ | SDC | SDC′ | SDC′′ |
| Control | PKU | 15.6 | 0.7 | 0.6 | 14.1 | 0.1 | 0.1 | AGEN | 9.2 | 0.2 | 0.1 | 8.8 | 0.1 | 0.1 |
Decoder | 5.8 | 0.8 | 0.7 | 5.9 | 1.2 | 1.2 | Execution | ALU | 4.1 | 1.1 | 1.0 | 1.5 | 0.2 | 0.0 | Storage | IRF | 3.2 | 0.8 | 0.7 | 2.6 | 0.1 | 0.1 | | Average | 7.6 | 0.7 | 0.6 | 6.6 | 0.3 | 0.3 |
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(b) SDC for REG (%) |
| Functional Blocks | Unit | LDST testbench | EXU testbench | SDC | SDC′ | SDC′′ | SDC | SDC′ | SDC′′ |
| Control | PKU | 4.1 | 0.9 | 0.9 | 5.3 | 0.1 | 0.1 | AGEN | 0.2 | 0.1 | 0.0 | 0.7 | 0.0 | 0.0 |
Decoder | 2.1 | 0.1 | 0.0 | 0.1 | 0.1 | 0.0 | Execution | ALU | 0.1 | 0.0 | 0.0 | 0.0 | 0.0 | 0.0 | Storage | IRF | 0.1 | 0.1 | 0.0 | 0.0 | 0.0 | 0.0 | | Average | 1.3 | 0.2 | 0.2 | 1.2 | 0.0 | 0.0 |
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