Research Article
Characterizing the Effects of Intermittent Faults on a Processor for Dependability Enhancement Strategy
Table 1
Representative units and corresponding modules under investigation in the target CMT.
| Functional Blocks | Unit | Module | Number of NETs | Number of REGs | Description |
| Control | AGEN | IFU_AGD | 3731 | 122 | Address generation |
IFU_AGC | 2388 | 62 | AGD control logic | PKU | PKU_PKD | 70 | 0 | Pick error detection or checking | PKU_PCK | 136 | 3 | Pick control logic |
PKU_SWL | 2144 | 78 | Thread finite state machines | Decoder | DEC_DED | 415 | 13 | Decode, error detection and checking | DEC_DCD | 184 | 0 | Decoding logic | DEC_DEL | 2411 | 29 | Decode control logic |
| Execution | ALU | EXU_EDP | 2161 | 30 | ALU data path | EXU_ECT | 1381 | 22 | ALU control logic |
| Storage | IRF | EXU_IRF | 329 | 14 | Integer register file | EXU_ECC | 479 | 11 | ECC generation | EXU_RML | 1742 | 52 | Register management logic |
|
|