Research Article

Design and Analysis of a New Carbon Nanotube Full Adder Cell

Table 6

Simulation results for different VDDs with 300 MHz input frequency and 20 fF output load.

Circuit
(μw)Delay (ns)PDP (fJ) (μw)Delay (ns)PDP (fJ)

CNT-AFS0.632.791.751.180.9951.17
CNTD40.832.552.121.560.911.42
CNTD30.772.451.81.430.91.29
CNTD20.963.082.961.801.11.98
CNTD11.782.915.173.321.043.45
Bulk-AFS3.004.9314.795.611.769.88