Research Article
480 MHz 10-tap Clock Generator Using Edge-Combiner DLL for USB 2.0 Applications
| Item | Unit | Proposed clock generator | Conventional PLL in Figure 2 |
| Structure | — | 2 ECDLL + 1 DLL | 1 PLL | Frequency | MHz | 480 | 480 | Locking-time | μs | 3.5 | 10.0 | Output jitter | ps | 0.8 | 2.0 | Technology | nm | 90 | 90 | Power | mW | 1.3 | 3.8 | Area | μm2 | 200 × 225 | 200 × 500 |
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