Research Article

480 MHz 10-tap Clock Generator Using Edge-Combiner DLL for USB 2.0 Applications

Figure 23

Postlayout simulation results from VCDL and EC applied to DLL1 for variable condition at 𝑉 C = 0 . 5  V.
267247.fig.0023a
(a) ff/1.30 V/−40°C
267247.fig.0023b
(b) tt/1.20 V/25°C
267247.fig.0023c
(c) ss/1.05 V/125°C