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Journal of Electrical and Computer Engineering
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2012
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Article
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Fig 22
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Research Article
480 MHz 10-tap Clock Generator Using Edge-Combiner DLL for USB 2.0 Applications
Figure 22
Postlayout simulation results from VCDL and EC applied to DLL1 for variable
𝑉
C
. The simulation condition is ff/1.30 V/−40°C.
(a)
OUT10
(b)
F
O
1