Research Article

Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links

Figure 21

Jitter tolerance assuming no clock-to-data skew for (a) DLL both compensated and uncompensated along with BPF of varying , (b) PLL for loop bandwidth of 15, 75, and 150 MHz, (c) ILO with at varying de-skew settings.
982314.fig.0021a
(a)
982314.fig.0021b
(b)
982314.fig.0021c
(c)