An Interpolated Flying-Adder-Based Frequency Synthesizer

Table 3

Performance comparison.

	Reference [8]’s FA frequency synthesizer	Reference [19]’s two-path FA synthesizer	Reference [20]’s two-path FA synthesizer	Reference [23]’s two-path ADPLL	This work
Process	0.6 μm, 3.3 V	0.18 μm, 1.8 V	0.18 μm, 3.3 V	0.13 μm, 1.3 V	0.18 μm, 1.8 V
Area (flying-adder)	1350 μm × 1260 μm	400 μm × 400 μm	690 μm × 630 μm	300 μm × 300 μm	295 μm × 353 μm
Output frequency range	57.27 MHz ~ 130 MHz	39.38 MHz ~ 226 MHz	62 KHz ~ 62.5 MHz	10 MHz ~ 500 MHz	33 MHz ~ 286 MHz
Accumulator width	32 bits	11 bits	11 bits		29 bits
Power consumption (multiphase PLL)	~40 mW	3.6 mW	32.4 μW		28.2 mW (I/O pads: ~14 mW, core:14.2 mW)
Power consumption (flying adder)	~150 mW
Peak-to-peak jitter	1132 ps at 120.05 MHz	130 ps at 187.5 MHz	410 ps	288 ps at 191.4 MHz	215.2 ps at 286 MHz
RMS jitter	165 ps at 120.05 MHz	50 ps at 187.5 MHz		39 ps at 191.4 MHz	40.2 ps at 286 MHz
FoM(GHz/W)	0.63	17.8			18.2