An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs

Table 2

Results produced by VPR for cluster size .

Netlist	FPGA size	Critical path (ns)		Channel width
alu4	20 × 20	7.3962	17.002	32
apex2	23 × 23	10.5786	17.1328	36
apex4	19 × 19	7.9168	20.638	38
bigkey	36 × 36	4.8433	8.082	20
clma	47 × 47	16.3227	29.769	50
des	42 × 42	7.7112	10.283	20
diffeq	20 × 20	7.39792	16.43	26
dsip	36 × 36	4.76876	7.735	22
elliptic	31 × 31	10.716	26.405	40
ex5p	17 × 17	8.00032	19.165	38
ex1010	35 × 35	12.4845	21.412	38
frisc	30 × 30	12.3652	26.615	44
misex3	19 × 19	9.45672	17.506	34
pdc	35 × 35	14.9399	25.374	54
s298	23 × 23	11.8196	18.741	32
s38417	40 × 40	9.15104	16.148	30
s38584.1	40 × 40	8.11126	20.906	32
seq	22 × 22	8.31452	17.723	34
spla	31 × 31	10.037	30.291	48
tseng	17 × 17	5.99362	13.987	20