A Low Threshold Voltage Ultradynamic Voltage Scaling SRAM Write Assist Technique for High-Speed Applications

Table 1

Simulation results of different write assist techniques.

Parameters	6T SRAM cell	UDVS WAC SRAM cell	TNBL WAC SRAM cell	Proposed low Vth UDVS WAC SRAM cell
Write delay (ps)	60.31	47.79	51.65	40.25
Read delay (ps)	77.48	81.5	93.27	66.42
Static power (nW)	204	96.57	158	49.77
Dynamic power (nW)	637	253	276	330