A New Statistical Method for Maximum Power Estimation in CMOS VLSI Circuits
A method for maximum power estimation in CMOS VLSI circuits is proposed. The method is based on extreme value theory and allows for the calculation of the upper end point of the probability distribution which is followed by the instantaneous power drawn from the supply bus. The main features of the method are the relatively small and circuitin-dependent subset of input patterns required for accurate prediction of maximum power and its simulative nature which ensures that no over-simplifying assumptions are made. Application of the proposed method to eight distributions, which come close to the behavior of power consumption in VLSI circuits, proved its superior capabilities with respect to existing methods.
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